FMF Timing for s28hl512t Parts version: | author: | mod date: | changes made: V1.0 M.Stojanovic 18 Mar 27 Initial release V1.1 B.Barac 19 Feb 01 Updated according rev *J 1ns s28hl512t S28HL512TFPBHI010_15pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHI013_15pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHV010_15pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHV013_15pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHA010_15pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHA013_15pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHB010_15pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHB013_15pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHM010_15pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHM013_15pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 The values listed are for VCC=2.7V to 3.6V, CL=15pF,Industrial and Automotive Ta=-40 to +85 Celsius (DELAY (ABSOLUTE (COND timing_SPI && ~glitch (IOPATH SCK SO (1.5:2.3:8) (1.5:2.3:8) () (1.5:2.3:8) () (1.5:2.3:8))) (COND timing_SPI && ~glitch (IOPATH SCK SI (1.5:2.3:8) (1.5:2.3:8) () (1.5:2.3:8) () (1.5:2.3:8))) (COND timing_SPI && ~glitch (IOPATH SCK IO2 (1.5:2.3:8) (1.5:2.3:8) () (1.5:2.3:8) () (1.5:2.3:8))) (COND timing_SPI && ~glitch (IOPATH SCK IO3 (1.5:2.3:8) (1.5:2.3:8) () (1.5:2.3:8) () (1.5:2.3:8))) (COND timing_SPI && ~glitch (IOPATH SCK IO4 (1.5:2.3:8) (1.5:2.3:8) () (1.5:2.3:8) () (1.5:2.3:8))) (COND timing_SPI && ~glitch (IOPATH SCK IO5 (1.5:2.3:8) (1.5:2.3:8) () (1.5:2.3:8) () (1.5:2.3:8))) (COND timing_SPI && ~glitch (IOPATH SCK IO6 (1.5:2.3:8) (1.5:2.3:8) () (1.5:2.3:8) () (1.5:2.3:8))) (COND timing_SPI && ~glitch (IOPATH SCK IO7 (1.5:2.3:8) (1.5:2.3:8) () (1.5:2.3:8) () (1.5:2.3:8))) (COND timing30_SPI && ~glitch (IOPATH SCK SO (1.5:2.3:6.5) (1.5:2.3:6.5) () (1.5:2.3:6.5) () (1.5:2.3:6.5))) (COND timing30_SPI && ~glitch (IOPATH SCK SI (1.5:2.3:6.5) (1.5:2.3:6.5) () (1.5:2.3:6.5) () (1.5:2.3:6.5))) (COND timing30_SPI && ~glitch (IOPATH SCK IO2 (1.5:2.3:6.5) (1.5:2.3:6.5) () (1.5:2.3:6.5) () (1.5:2.3:6.5))) (COND timing30_SPI && ~glitch (IOPATH SCK IO3 (1.5:2.3:6.5) (1.5:2.3:6.5) () (1.5:2.3:6.5) () (1.5:2.3:6.5))) (COND timing30_SPI && ~glitch (IOPATH SCK IO4 (1.5:2.3:6.5) (1.5:2.3:6.5) () (1.5:2.3:6.5) () (1.5:2.3:6.5))) (COND timing30_SPI && ~glitch (IOPATH SCK IO5 (1.5:2.3:6.5) (1.5:2.3:6.5) () (1.5:2.3:6.5) () (1.5:2.3:6.5))) (COND timing30_SPI && ~glitch (IOPATH SCK IO6 (1.5:2.3:6.5) (1.5:2.3:6.5) () (1.5:2.3:6.5) () (1.5:2.3:6.5))) (COND timing30_SPI && ~glitch (IOPATH SCK IO7 (1.5:2.3:6.5) (1.5:2.3:6.5) () (1.5:2.3:6.5) () (1.5:2.3:6.5))) (COND OPI_IT && ~glitch (IOPATH SCK SO (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK SI (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO2 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO3 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO4 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO5 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO6 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO7 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (IOPATH CSNeg SO () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg SI () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO2 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO3 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO4 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO5 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO6 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO7 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg DS () () (2:4:7.25) (2:4:7.25) (2:4:7.25) (2:4:7.25)) )) (TIMINGCHECK (SETUP (COND NegOPI_NegF51M CSNeg) (posedge SCK) (5)) (SETUP (COND NegOPI_F51M CSNeg) (posedge SCK) (4)) (SETUP (COND osdr CSNeg) SCK (4)) (SETUP (COND oddr CSNeg) SCK (4)) (SETUP (COND NegOPI_F51M SI) (posedge SCK) (2)) (SETUP (COND NegOPI_NegF51M SI)( posedge SCK) (5)) (SETUP (COND odatain SI ) (posedge SCK)(0.6)) (SETUP (COND odatain_ddr SI) SCK (0.6)) (SETUP RESETNeg CSNeg (50)) (HOLD (COND ~mode3 CSNeg) SCK (4)) (HOLD (COND mode3sdr CSNeg) SCK (6.5)) (HOLD (COND mode3spi CSNeg) SCK (6)) (HOLD (COND NegOPI_F51M SI) (posedge SCK) (2)) (HOLD (COND NegOPI_NegF51M SI) (posedge SCK) (5)) (HOLD (COND odatain SI) (posedge SCK) (0.6)) (HOLD (COND odatain_ddr SI) SCK (0.6)) (HOLD CSNeg RESETNeg (100)) (WIDTH (COND rd SCK) (10)) (WIDTH (COND fast_rd SCK) (3)) (WIDTH (COND ddrd SCK) (3)) (WIDTH (posedge CSNeg) (10)) (WIDTH (COND RDYBSY (posedge CSNeg)) (20)) (WIDTH (COND prg_ers (posedge CSNeg)) (50)) (WIDTH (negedge RESETNeg) (200)) (WIDTH (posedge RESETNeg) (50)) (PERIOD (COND rd SCK) (20)) (PERIOD (COND fast_rd SCK) (6)) (PERIOD (COND ddrd SCK) (6)) )) (CELL (CELLTYPE "BUFFER") (INSTANCE %LABEL%/BUF_DOutZ) (DELAY (ABSOLUTE (DEVICE OUT (1))))) (CELL (CELLTYPE "BUFFER") (INSTANCE %LABEL%/BUF_DS) (DELAY (ABSOLUTE (DEVICE OUT (1.5:2.3:7.25))))) (CELL (CELLTYPE "BUFFER") (INSTANCE %LABEL%/BUF_DOut) (DELAY (ABSOLUTE (DEVICE OUT (1.5:2.3:7.25))))) (CELL (CELLTYPE "BUFFER") (INSTANCE dut/BUF_SEERC) (DELAY (ABSOLUTE (DEVICE OUT (55:55:60)))) S28HL512TFPBHI010_30pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHI013_30pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHV010_30pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHV013_30pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHA010_30pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHA013_30pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHB010_30pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHB013_30pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHM010_30pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 S28HL512TFPBHM013_30pFCypress Semiconductor Corporation, Document Number 002-18216 Rev. *J Revised Oct 03, 2018 The values listed are for VCC=2.7V to 3.6V, CL=30pF, Industrial and Automotive Ta=-40 to +85 Celsius (DELAY (ABSOLUTE (COND timing_SPI && ~glitch (IOPATH SCK SO (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing_SPI && ~glitch (IOPATH SCK SI (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing_SPI && ~glitch (IOPATH SCK IO2 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing_SPI && ~glitch (IOPATH SCK IO3 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing_SPI && ~glitch (IOPATH SCK IO4 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing_SPI && ~glitch (IOPATH SCK IO5 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing_SPI && ~glitch (IOPATH SCK IO6 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing_SPI && ~glitch (IOPATH SCK IO7 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing30_SPI && ~glitch (IOPATH SCK SO (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing30_SPI && ~glitch (IOPATH SCK SI (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing30_SPI && ~glitch (IOPATH SCK IO2 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing30_SPI && ~glitch (IOPATH SCK IO3 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing30_SPI && ~glitch (IOPATH SCK IO4 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing30_SPI && ~glitch (IOPATH SCK IO5 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing30_SPI && ~glitch (IOPATH SCK IO6 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND timing30_SPI && ~glitch (IOPATH SCK IO7 (1.5:2.3:9) (1.5:2.3:9) () (1.5:2.3:9) () (1.5:2.3:9))) (COND OPI_IT && ~glitch (IOPATH SCK SO (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK SI (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO2 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO3 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO4 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO5 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO6 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (COND OPI_IT && ~glitch (IOPATH SCK IO7 (1.5:2.3:7.25) (1.5:2.3:7.25) () (1.5:2.3:7.25) () (1.5:2.3:7.25))) (IOPATH CSNeg SO () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg SI () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO2 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO3 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO4 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO5 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO6 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg IO7 () () (2:4:7.5) () (2:4:7.5) ()) (IOPATH CSNeg DS () () (2:4:7.25) (2:4:7.25) (2:4:7.25) (2:4:7.25)) )) (TIMINGCHECK (SETUP (COND NegOPI_NegF51M CSNeg) (posedge SCK) (5)) (SETUP (COND NegOPI_F51M CSNeg) (posedge SCK) (4)) (SETUP (COND osdr CSNeg) SCK (4)) (SETUP (COND oddr CSNeg) SCK (4)) (SETUP (COND NegOPI_F51M SI) (posedge SCK) (2)) (SETUP (COND NegOPI_NegF51M SI)( posedge SCK) (5)) (SETUP (COND odatain SI ) (posedge SCK)(0.6)) (SETUP (COND odatain_ddr SI) SCK (0.6)) (SETUP RESETNeg CSNeg (50)) (HOLD (COND ~mode3 CSNeg) SCK (4)) (HOLD (COND mode3sdr CSNeg) SCK (6.5)) (HOLD (COND mode3spi CSNeg) SCK (6)) (HOLD (COND NegOPI_F51M SI) (posedge SCK) (2)) (HOLD (COND NegOPI_NegF51M SI) (posedge SCK) (5)) (HOLD (COND odatain SI) (posedge SCK) (0.6)) (HOLD (COND odatain_ddr SI) SCK (0.6)) (HOLD CSNeg RESETNeg (100)) (WIDTH (COND rd SCK) (10)) (WIDTH (COND fast_rd SCK) (3)) (WIDTH (COND ddrd SCK) (3)) (WIDTH (posedge CSNeg) (10)) (WIDTH (COND RDYBSY (posedge CSNeg)) (20)) (WIDTH (COND prg_ers (posedge CSNeg)) (50)) (WIDTH (negedge RESETNeg) (200)) (WIDTH (posedge RESETNeg) (50)) (PERIOD (COND rd SCK) (20)) (PERIOD (COND fast_rd SCK) (6)) (PERIOD (COND ddrd SCK) (6)) )) (CELL (CELLTYPE "BUFFER") (INSTANCE %LABEL%/BUF_DOutZ) (DELAY (ABSOLUTE (DEVICE OUT (1))))) (CELL (CELLTYPE "BUFFER") (INSTANCE %LABEL%/BUF_DS) (DELAY (ABSOLUTE (DEVICE OUT (1.5:2.3:7.25))))) (CELL (CELLTYPE "BUFFER") (INSTANCE %LABEL%/BUF_DOut) (DELAY (ABSOLUTE (DEVICE OUT (1.5:2.3:7.25))))) (CELL (CELLTYPE "BUFFER") (INSTANCE dut/BUF_SEERC) (DELAY (ABSOLUTE (DEVICE OUT (55:55:60))))