version: | author: | mod date: | changes made: V1.0 D.Randjelovic 05 Nov 28 Initial release 1ns cy7c1363 cy7c1363a-150ajc_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-150ac_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-150bgc_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 The values listed are for Vdd=3.135V to 3.63V, Vddq=3.3V, Ta=0 to +70 Celsius Typical values are measured at Vdd=3.3V, Vddq=3.3V, and 20 ns cycle time (DELAY (ABSOLUTE (IOPATH CLK DQA0 (2:4:6) (2:4:6) (2:2.8:3.5) (2:4:6) (2:2.8:3.5) (2:4:6)) (IOPATH CLK DQA1 (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2)) (IOPATH OENeg DQA0 ()()(1.2:2.4:3.5) (1.2:2.4:3.5)(1.2:2.4:3.5)(1.2:2.4:3.5)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (6.7)) (WIDTH (posedge CLK)(2.5)) (WIDTH (negedge CLK)(2.5)) (SETUP A0 CLK (1.5)) (SETUP DQA0 CLK (1.5)) (SETUP ADVNeg CLK (1.5)) (SETUP ADSCNeg CLK (1.5)) (SETUP BWANeg CLK (1.5)) (SETUP CE2 CLK (1.5)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) ) cy7c1363a-150ajc_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-150ac_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-150bgc_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 The values listed are for Vdd=3.135V to 3.63V, Vddq=2.5V, Ta=0 to +70 Celsius Typical values are measured at Vdd=3.3V, Vddq=2.5V, and 20 ns cycle time (DELAY (ABSOLUTE (IOPATH CLK DQA0 (2.2:4.4:6.5) (2.2:4.4:6.5) (2:2.8:3.5) (2.2:4.4:6.5) (2:2.8:3.5) (2.2:4.4:6.5)) (IOPATH CLK DQA1 (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2)) (IOPATH OENeg DQA0 ()()(1.2:2.4:3.5) (1.5:3:4.5)(1.2:2.4:3.5)(1.5:3:4.5)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (6.7)) (WIDTH (posedge CLK)(2.5)) (WIDTH (negedge CLK)(2.5)) (SETUP A0 CLK (1.5)) (SETUP DQA0 CLK (1.5)) (SETUP ADVNeg CLK (1.5)) (SETUP ADSCNeg CLK (1.5)) (SETUP BWANeg CLK (1.5)) (SETUP CE2 CLK (1.5)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) ) cy7c1363a-133ajc_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-133ac_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-133bgc_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-133aji_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-133ai_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-133bgi_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 The values listed are for Vdd=3.135V to 3.63V, Vddq=3.3V, Ta=-40 to +85 Celsius Typical values are measured at Vdd=3.3V, Vddq=3.3V, and 20 ns cycle time (DELAY (ABSOLUTE (IOPATH CLK DQA0 (2.2:4.4:6.5) (2.2:4.4:6.5) (2:2.8:3.5) (2.2:4.4:6.5) (2:2.8:3.5) (2.2:4.4:6.5)) (IOPATH CLK DQA1 (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2)) (IOPATH OENeg DQA0 ()()(1.2:2.4:3.5) (1.2:2.4:3.5)(1.2:2.4:3.5)(1.2:2.4:3.5)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (7.5)) (WIDTH (posedge CLK)(2.5)) (WIDTH (negedge CLK)(2.5)) (SETUP A0 CLK (1.5)) (SETUP DQA0 CLK (1.5)) (SETUP ADVNeg CLK (1.5)) (SETUP ADSCNeg CLK (1.5)) (SETUP BWANeg CLK (1.5)) (SETUP CE2 CLK (1.5)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) ) cy7c1363a-133ajc_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-133ac_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-133bgc_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-133aji_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-133ai_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-133bgi_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 The values listed are for Vdd=3.135V to 3.63V, Vddq=2.5V, Ta=-40 to +85 Celsius Typical values are measured at Vdd=3.3V, Vddq=2.5V, and 20 ns cycle time (DELAY (ABSOLUTE (IOPATH CLK DQA0 (2.4:4.8:7) (2.4:4.8:7) (2:2.8:3.5) (2.4:4.8:7) (2:2.8:3.5) (2.4:4.8:7)) (IOPATH CLK DQA1 (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2)) (IOPATH OENeg DQA0 ()()(1.2:2.4:3.5) (1.5:3:4.5)(1.2:2.4:3.5)(1.5:3:4.5)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (7.5)) (WIDTH (posedge CLK)(2.5)) (WIDTH (negedge CLK)(2.5)) (SETUP A0 CLK (1.5)) (SETUP DQA0 CLK (1.5)) (SETUP ADVNeg CLK (1.5)) (SETUP ADSCNeg CLK (1.5)) (SETUP BWANeg CLK (1.5)) (SETUP CE2 CLK (1.5)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) ) cy7c1363a-117ajc_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-117ac_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-117bgc_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-117aji_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-117ai_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-117bgi_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 The values listed are for Vdd=3.135V to 3.63V, Vddq=3.3V, Ta=-40 to +85 Celsius Typical values are measured at Vdd=3.3V, Vddq=3.3V, and 20 ns cycle time (DELAY (ABSOLUTE (IOPATH CLK DQA0 (2.4:4.8:7) (2.4:4.8:7) (2:2.8:3.5) (2.4:4.8:7) (2:2.8:3.5) (2.4:4.8:7)) (IOPATH CLK DQA1 (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2)) (IOPATH OENeg DQA0 ()()(1.2:2.4:3.5) (1.2:2.4:3.5)(1.2:2.4:3.5)(1.2:2.4:3.5)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (8.5)) (WIDTH (posedge CLK)(3)) (WIDTH (negedge CLK)(3)) (SETUP A0 CLK (1.8)) (SETUP DQA0 CLK (1.8)) (SETUP ADVNeg CLK (1.8)) (SETUP ADSCNeg CLK (1.8)) (SETUP BWANeg CLK (1.8)) (SETUP CE2 CLK (1.8)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) ) cy7c1363a-117ajc_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-117ac_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-117bgc_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-117aji_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-117ai_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-117bgi_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 The values listed are for Vdd=3.135V to 3.63V, Vddq=2.5V, Ta=-40 to +85 Celsius Typical values are measured at Vdd=3.3V, Vddq=2.5V, and 20 ns cycle time (DELAY (ABSOLUTE (IOPATH CLK DQA0 (2.5:5:7.5) (2.5:5:7.5) (2:2.8:3.5) (2.5:5:7.5) (2:2.8:3.5) (2.5:5:7.5)) (IOPATH CLK DQA1 (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2)) (IOPATH OENeg DQA0 ()()(1.2:2.4:3.5) (1.5:3:4.5)(1.2:2.4:3.5)(1.5:3:4.5)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (8.5)) (WIDTH (posedge CLK)(3)) (WIDTH (negedge CLK)(3)) (SETUP A0 CLK (1.8)) (SETUP DQA0 CLK (1.8)) (SETUP ADVNeg CLK (1.8)) (SETUP ADSCNeg CLK (1.8)) (SETUP BWANeg CLK (1.8)) (SETUP CE2 CLK (1.8)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) ) cy7c1363a-100ajc_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-100ac_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-100bgc_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-100aji_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-100ai_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-100bgi_3V3Cypress 38-05259 Rev. *C Revised Jan. 18,2003 The values listed are for Vdd=3.135V to 3.63V, Vddq=3.3V, Ta=-40 to +85 Celsius Typical values are measured at Vdd=3.3V, Vddq=3.3V, and 20 ns cycle time (DELAY (ABSOLUTE (IOPATH CLK DQA0 (2.7:5.4:8) (2.7:5.4:8) (2:2.8:3.5) (2.7:5.4:8) (2:2.8:3.5) (2.7:5.4:8)) (IOPATH CLK DQA1 (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2)) (IOPATH OENeg DQA0 ()()(1.2:2.4:3.5) (1.3:2.6:4)(1.2:2.4:3.5)(1.3:2.6:4)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (10)) (WIDTH (posedge CLK)(3.5)) (WIDTH (negedge CLK)(3.5)) (SETUP A0 CLK (2)) (SETUP DQA0 CLK (2)) (SETUP ADVNeg CLK (2)) (SETUP ADSCNeg CLK (2)) (SETUP BWANeg CLK (2)) (SETUP CE2 CLK (2)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) ) cy7c1363a-100ajc_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-100ac_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-100bgc_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-100aji_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-100ai_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 cy7c1363a-100bgi_2V5Cypress 38-05259 Rev. *C Revised Jan. 18,2003 The values listed are for Vdd=3.135V to 3.63V, Vddq=2.5V, Ta=-40 to +85 Celsius Typical values are measured at Vdd=3.3V, Vddq=2.5V, and 20 ns cycle time (DELAY (ABSOLUTE (IOPATH CLK DQA0 (3:6:9) (3:6:9) (2:2.8:3.5) (3:6:9) (2:2.8:3.5) (3:6:9)) (IOPATH CLK DQA1 (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2)) (IOPATH OENeg DQA0 ()()(1.2:2.4:3.5) (1.7:3.4:5)(1.2:2.4:3.5)(1.7:3.4:5)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (10)) (WIDTH (posedge CLK)(3.5)) (WIDTH (negedge CLK)(3.5)) (SETUP A0 CLK (2)) (SETUP DQA0 CLK (2)) (SETUP ADVNeg CLK (2)) (SETUP ADSCNeg CLK (2)) (SETUP BWANeg CLK (2)) (SETUP CE2 CLK (2)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) ) gs881f18at-7Giga Semiconductor, Inc. Datasheet 512K x 18 Sync Burst SRAM Rev. 1.00 June,2003 The values listed are for Vdd=3V to 3.6V, Ta=-40 to +85 Celsius (DELAY (ABSOLUTE (IOPATH CLK DQA0 (3:4.8:7) (3:4.8:7) (1.5:2.3:3) (3:4.8:7) (1.5:2.3:3) (3:4.8:7)) (IOPATH CLK DQA1 (3:3:3) (3:3:3) (3:3:3) (3:3:3) (3:3:3) (3:3:3)) (IOPATH OENeg DQA0 ()()(1:2:3) (1.2:2.4:3.5)(1:2:3)(1.2:2.4:3.5)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (7)) (WIDTH (posedge CLK)(1.3)) (WIDTH (negedge CLK)(1.5)) (SETUP A0 CLK (1.5)) (SETUP DQA0 CLK (1.5)) (SETUP ADVNeg CLK (1.5)) (SETUP ADSCNeg CLK (1.5)) (SETUP BWANeg CLK (1.5)) (SETUP CE2 CLK (1.5)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) ) cy7c1363b-133ajcCypress 38-05302 Rev. ** Revised Aug. 16,2002 cy7c1363b-133acCypress 38-05302 Rev. ** Revised Aug. 16,2002 cy7c1363b-133bgcCypress 38-05302 Rev. ** Revised Aug. 16,2002 cy7c1363b-133bzcCypress 38-05302 Rev. ** Revised Aug. 16,2002 The values listed are for Vdd=3.135V to 3.6V, Ta=0 to +70 Celsius (DELAY (ABSOLUTE (IOPATH CLK DQA0 (2.2:4.4:6.5) (2.2:4.4:6.5) (0:1.8:3.5) (2.2:4.4:6.5) (0:1.8:3.5) (2.2:4.4:6.5)) (IOPATH CLK DQA1 (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2)) (IOPATH OENeg DQA0 ()()(1.2:2.4:3.5) (1.2:2.4:3.5)(1.2:2.4:3.5)(1.2:2.4:3.5)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (7.5)) (WIDTH (posedge CLK)(3)) (WIDTH (negedge CLK)(3)) (SETUP A0 CLK (1.5)) (SETUP DQA0 CLK (1.5)) (SETUP ADVNeg CLK (1.5)) (SETUP ADSCNeg CLK (1.5)) (SETUP BWANeg CLK (1.5)) (SETUP CE2 CLK (1.5)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) ) cy7c1363b-117ajcCypress 38-05302 Rev. ** Revised Aug. 16,2002 cy7c1363b-117acCypress 38-05302 Rev. ** Revised Aug. 16,2002 cy7c1363b-117bgcCypress 38-05302 Rev. ** Revised Aug. 16,2002 cy7c1363b-117bzcCypress 38-05302 Rev. ** Revised Aug. 16,2002 The values listed are for Vdd=3.135V to 3.6V, Ta=0 to +70 Celsius (DELAY (ABSOLUTE (IOPATH CLK DQA0 (2.5:5:7.5) (2.5:5:7.5) (0:1.8:3.5) (2.5:5:7.5) (0:1.8:3.5) (2.5:5:7.5)) (IOPATH CLK DQA1 (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2)) (IOPATH OENeg DQA0 ()()(1.2:2.4:3.5) (1.2:2.4:3.5)(1.2:2.4:3.5)(1.2:2.4:3.5)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (8.5)) (WIDTH (posedge CLK)(3.2)) (WIDTH (negedge CLK)(3.2)) (SETUP A0 CLK (1.5)) (SETUP DQA0 CLK (1.5)) (SETUP ADVNeg CLK (1.5)) (SETUP ADSCNeg CLK (1.5)) (SETUP BWANeg CLK (1.5)) (SETUP CE2 CLK (1.5)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) ) cy7c1363b-100ajcCypress 38-05302 Rev. ** Revised Aug. 16,2002 cy7c1363b-100acCypress 38-05302 Rev. ** Revised Aug. 16,2002 cy7c1363b-100bgcCypress 38-05302 Rev. ** Revised Aug. 16,2002 cy7c1363b-100bzcCypress 38-05302 Rev. ** Revised Aug. 16,2002 The values listed are for Vdd=3.135V to 3.6V, Ta=0 to +70 Celsius (DELAY (ABSOLUTE (IOPATH CLK DQA0 (2.8:5.6:8.5) (2.8:5.6:8.5) (0:1.8:3.5) (2.8:5.6:8.5) (0:1.8:3.5) (2.8:5.6:8.5)) (IOPATH CLK DQA1 (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2) (2:2:2)) (IOPATH OENeg DQA0 ()()(1.2:2.4:3.5) (1.2:2.4:3.5)(1.2:2.4:3.5)(1.2:2.4:3.5)) (IOPATH OENeg DQA1 (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) )) (TIMINGCHECK (PERIOD (posedge CLK) (10)) (WIDTH (posedge CLK)(4)) (WIDTH (negedge CLK)(4)) (SETUP A0 CLK (1.5)) (SETUP DQA0 CLK (1.5)) (SETUP ADVNeg CLK (1.5)) (SETUP ADSCNeg CLK (1.5)) (SETUP BWANeg CLK (1.5)) (SETUP CE2 CLK (1.5)) (HOLD A0 CLK (0.5)) (HOLD DQA0 CLK (0.5)) (HOLD ADSCNeg CLK (0.5)) (HOLD BWANeg CLK (0.5)) (HOLD ADVNeg CLK (0.5)) (HOLD CE2 CLK (0.5)) )