FMF Timing for adv7123 Parts version: | author: | mod date: | changes made: V1.0 R. Munden 03 Jan 02 Initial release 1ns adv7123 ADV7123KST50_3V3Analog Devices datasheet REV. B 2002 The Values listed are for VCC=3.0V-3.6V, CL=10pF, Ta=-40 to +85 Celsius (DELAY (ABSOLUTE (IOPATH CLK IOR (5:7.5:10)) )) (TIMINGCHECK (SETUP R0 CLK (.2:.2:.2)) (HOLD R0 CLK (1.5:1.5:1.5)) (WIDTH (posedge CLK) (8)) (WIDTH (negedge CLK) (8)) (PERIOD (posedge CLK) (20)) ) ADV7123KST140_3V3Analog Devices datasheet REV. B 2002 The Values listed are for VCC=3.0V-3.6V, CL=10pF, Ta=-40 to +85 Celsius (DELAY (ABSOLUTE (IOPATH CLK IOR (5:7.5:10)) )) (TIMINGCHECK (SETUP R0 CLK (.2:.2:.2)) (HOLD R0 CLK (1.5:1.5:1.5)) (WIDTH (posedge CLK) (2.85:2.85:2.85)) (WIDTH (negedge CLK) (2.85:2.85:2.85)) (PERIOD (posedge CLK) (7.14:7.14:7.14)) ) ADV7123JST240_3V3Analog Devices datasheet REV. B 2002 The Values listed are for VCC=3.0V-3.6V, CL=10pF, Ta=0 to +70 Celsius (DELAY (ABSOLUTE (IOPATH CLK IOR (5:7.5:10)) )) (TIMINGCHECK (SETUP R0 CLK (.2:.2:.2)) (HOLD R0 CLK (1.5:1.5:1.5)) (WIDTH (posedge CLK) (1.875:1.875:1.875)) (WIDTH (negedge CLK) (1.875:1.875:1.875)) (PERIOD (posedge CLK) (4.17:4.17:4.17)) ) ADV7123JST330_3V3Analog Devices datasheet REV. B 2002 The Values listed are for VCC=3.0V-3.6V, CL=10pF, Ta=0 to +70 Celsius (DELAY (ABSOLUTE (IOPATH CLK IOR (5:7.5:10)) )) (TIMINGCHECK (SETUP R0 CLK (.2:.2:.2)) (HOLD R0 CLK (1.5:1.5:1.5)) (WIDTH (posedge CLK) (1.4:1.4:1.4)) (WIDTH (negedge CLK) (1.4:1.4:1.4)) (PERIOD (posedge CLK) (3.03:3.03:3.03)) ) ADV7123KST50_5VAnalog Devices datasheet REV. B 2002 The Values listed are for VCC=4.5V-5.5V, CL=10pF, Ta=-40 to +85 Celsius (DELAY (ABSOLUTE (IOPATH CLK IOR (2.7:5.5:8.2)) )) (TIMINGCHECK (SETUP R0 CLK (.5:.5:.5)) (HOLD R0 CLK (1.5:1.5:1.5)) (WIDTH (posedge CLK) (8:8:8)) (WIDTH (negedge CLK) (8:8:8)) (PERIOD (posedge CLK) (20:20:20)) ) ADV7123KST140_5VAnalog Devices datasheet REV. B 2002 The Values listed are for VCC=4.5V-5.5V, CL=10pF, Ta=-40 to +85 Celsius (DELAY (ABSOLUTE (IOPATH CLK IOR (2.7:5.5:8.2)) )) (TIMINGCHECK (SETUP R0 CLK (.5:.5:.5)) (HOLD R0 CLK (1.5:1.5:1.5)) (WIDTH (posedge CLK) (2.85:2.85:2.85)) (WIDTH (negedge CLK) (2.85:2.85:2.85)) (PERIOD (posedge CLK) (7.14:7.14:7.14)) ) ADV7123JST240_5VAnalog Devices datasheet REV. B 2002 The Values listed are for VCC=4.5V-5.5V, CL=10pF, Ta=0 to +70 Celsius (DELAY (ABSOLUTE (IOPATH CLK IOR (2.7:5.5:8.2)) )) (TIMINGCHECK (SETUP R0 CLK (.5:.5:.5)) (HOLD R0 CLK (1.5:1.5:1.5)) (WIDTH (posedge CLK) (1.875:1.875:1.875)) (WIDTH (negedge CLK) (1.875:1.875:1.875)) (PERIOD (posedge CLK) (4.17:4.17:4.17)) )