This month's story comes from Corey Rogers:
Corey writes:
"I found a copy of "ASIC and FPGA Verification: A Guide to Component Modeling" at the local library. I found your book so useful that I ordered a copy from Amazon, the book bridges the gap between writing basic VHDL code and writing advanced VHDL code with timing parameters and constraints."
Do you have an experience with board or system level verification you would like to share? If so, please send it to the email address at the bottom of this page.
The following is a list of 55 updates to the Free Model Foundry website for the month of March 2007.
Please note we are continuing to add Verilog models to the library.
There are now models and timing files covering over 10,500 part numbers on the FMF website.
Model Additions and Updates:
The following models have either been added or updated in the released libraries:
eclps:
fifo:
flash:
ram:
Separate VHDL and Verilog model list pages reflect these updates.
For full details on FMF modeling practices and how to use models in your verification work, you may purchase "ASIC & FPGA Verification, A guide to Component Modeling" by Richard Munden, available from Amazon.com.
Keep up to date on news and events at FMF by subscribing to the FMF Monthly Newsletter. To put yourself on the distribution list, send e-mail to: fmf-request@freemodelfoundry.com. Please include your e-mail address in the message body.
Have a great April
Contact Richard Munden: munden@freemodelfoundry.com